Field-Programmable Logic and Applications: 5th International Workshop, FPL '95, Oxford, United Kingdom, August 29 - September 1, 1995. Proceedings
Springer Science & Business Media, Aug 21, 1995 - Computers - 450 pages
This volume constitutes the proceedings of the Fifth International Workshop on Field-Programmable Logic and Its Applications, FPL '95, held in Oxford, UK in August/September 1995.
The volume presents 46 full revised papers carefully selected by the program committee from a large number and wide range of submissions. The papers document the progress achieved since the predecessor conference (see LNCS 849). They are organized in sections on architectures, platforms, tools, arithmetic and signal processing, embedded systems and other applications, and reconfigurable design and models.
What people are saying - Write a review
Other editions - View all
Actel adder algorithm application approach architecture arithmetic ASIC bit-serial buffers cell chip circuit CLBs clock cycles codewords compiler complex configuration connected Coprocessor CPLDs CSYN Custom Computing decoding delay described device DSP processor dynamically reconfigurable encoder execution Field Programmable Gate FIR filter floating point FPGA FPGA-based function global Hardware Object host IEEE implementation input interconnect interface JTAG language latches loop machine mapping memory microprocessor modules multiplier netlist node operation optimized output parallel partitioning path performance pipelined pixel place and route placement and routing port Programmable Gate Arrays Programmable Logic prototyping reconfigurable computing reconfigurable logic register file self-timed sensor serial shown in Figure simulation specific speed SRAM structure synchronous synthesis systolic arrays Transputer vector Verilog VHDL Viewlogic VMEbus
Page 428 - In DA Buell and KL Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 31—39, Napa, CA, April 1994.