VLSI fabrication principles: silicon and gallium arsenide
Fully updated with the latest technologies, this edition covers the fundamental principles underlying fabrication processes for semiconductor devices along with integrated circuits made from silicon and gallium arsenide. Stresses fabrication criteria for such circuits as CMOS, bipolar, MOS, FET, etc. These diverse technologies are introduced separately and then consolidated into complete circuits. An Instructor's Manual presenting detailed solutions to all the problems in the book is available from the Wiley editorial department.
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A/min active addition alloy aluminum annealing anodization approach arsenic atoms beam boron carrier chemical commonly defects deposition devices dislocation dopant doping doping profile effects Electrochem Electron Dev emitter energy epitaxial growth epitaxial layer etch rate etchant fabrication films formation GaAs gallium arsenide gate gold grown growth rate heat treatment hydrogen impurity integrated circuits interface interstitial ion implantation junction depth lattice mask material melt metal microcircuit n-type ohmic contacts oxygen p-n junction p-n-p transistor pattern phase diagram phosphorus photoresist Phys planar planes plasma polysilicon pressure problem reaction reactor region relatively resistor Schottky diode semi-insulating semiconductor sheet resistance shown in Fig silane silica silicide silicon dioxide silicon nitride silicon surface SiO2 slice Solid State Electron solution species sputtering structure substrate surface concentration techniques thermal oxidation thickness transistor Typically vacancies values vapor VLSI voltage wafer zinc