Modeling and Verification Using UML Statecharts: A Working Guide to Reactive System Design, Runtime Monitoring and Execution-based Model CheckingAs systems being developed by industry and government grow larger and more complex, the need for superior specification and verification approaches and tools becomes increasingly vital. The developer and customer must have complete confidence that the design produced is correct, and that it meets forma development and verification standards. In this text, UML expert author Dr. Doron Drusinsky compiles all the latest information on the application of UML (Universal Modeling Language) statecharts, temporal logic, automata, and other advanced tools for run-time monitoring and verification. This is the first book that deals specifically with UML verification techniques. This important information is introduced within the context of real-life examples and solutions, particularly focusing on national defense applications. A practical text, as opposed to a high-level theoretical one, it emphasizes getting the system developer up-to-speed on using the tools necessary for daily practice.
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Contents
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Statecharts | 43 |
Academic Specification Languages for Reactive Systems | 103 |
Using Statechart Assertions for Formal Specification | 141 |
Creating and Using Temporal Statechart Assertions | 217 |
Application of Formal Specifications and Runtime Monitoring to the Ballistic Missile Defense Project | 261 |
Other editions - View all
Modeling and Verification Using UML Statecharts: A Working Guide to Reactive ... Doron Drusinsky No preview available - 2006 |
Modeling and Verification Using UML Statecharts: A Working Guide to Reactive ... Doron Drusinsky No preview available - 2006 |
Common terms and phrases
actions alphabet asser assertion statechart assertion.newCar Assertion1 automatic behavior bSuccess bSuccess==false Car object CD-ROM CD-ROM Product Chapter computation tree computation-object concurrent Config configuration consider constraints Count_0 cycle default described deterministic domain of discourse echart ENFA event handler event Q example execution false Figure 2.7a Figure 4.8a fires flowchart formal language formal specification statechart FSMs Harel statechart Hence HFSM implementation Init input scenario input sequence input symbol interval isSuccess Java JUnit test keyPressed Kleene star LTL formula method model checking monitoring MTL assertion multitape newCar event NL requirement nondeterminism nondeterministic assertion nondeterministic statechart operator orthogonality primary statechart propositional logic recovery Regular Expressions runtime semantics simulation specification language State-1 state-configuration objects statechart assertion statechart in Figure statechart model StateRover StateRover’s sub-statechart technique temporal assertion temporal logic timeout tion TLC statechart TLC1 TLChart tool transition variable verification Wait-For-KeyPressed WBTestCase white-box test